The inventive concept relates generally to memory systems, memory devices, and methods of operating a memory system. More particularly the inventive concept relates to methods of operating a memory system including a nonvolatile memory device, wherein a migration operation is used to move data from a buffer region to a main region of the nonvolatile memory device.
Memory systems including one or more nonvolatile semiconductor memory devices have become staple components in contemporary consumer electronic products. A variety of nonvolatile semiconductor memory devices are known, including as examples, the electrically erasable programmable read only memory (EEPROM), the phase-change random access memory (PRAM), the magnetic random access memory (MRAM), and the resistance read only memory (ReRAM). Within the broad class of nonvolatile semiconductor memory devices, flash memory provides certain advantages such as rapid reading speed, low power consumption, very dense data storage capacity, etc. As a result, many contemporary memory systems incorporated in contemporary digital computational platforms and consumer electronics include flash memory as a data storage medium.
In general, a flash memory device stores data information by applying electrical charge to a conductive floating gate structure surrounded and isolated by an insulator film. However, a number of physical limitations and operating challenges exist in relation to the floating gate structure. For example, attempts to reduce the physical size of the floating gate structure in order to improve integration density of the constituent memory cells causes problems with undesired capacitive coupling of electrical charge between proximate memory cells and/or memory cell transistors.
Attempts to mitigate the capacitive coupling effects between proximate flash memory cells lead to the development of the so-called charge trap flash or CTF memory cell, wherein a CTF memory cell typically incorporates an isolator film fabricated from a material such as Si3N4, Al2O3, HfAlO, etc. as an electrical charge storing element replacing the conductive floating gate structure previously used. In certain three-dimensional (3D) memory cell array configurations, CTF memory cells have been used with good effect. Such configurations tend to greatly increase the per unit area, data-storage integration density of the constituent nonvolatile flash memory device. However, CTF memory cells are not without their own challenges. In particular, CTF memory cells often suffer from a phenomenon referred to as “initial verify shift” or “IVS”. This phenomenon is characterized by an undesired rearrangement of recombination of charge carriers (holes and/or electrons) on the charge storing layer of the CTF memory cells following execution of a program operation or an erase operation. Such charge carrier rearrangement tends to shift the threshold voltages of the CTF memory cells in a manner that may lead to data loss. Most troubling, the IVS phenomenon happens over a period of time following the programming (or erasing) of memory cells, and as such, memory cells already verified as having been properly programmed (or erased) may experience a threshold voltage shift that essentially changes the programmed (or erased) state of the memory cell.